[Legacy] Electronic Systems

State the name of the logic gate shown in Fig. 7.2.

Explain why terminal Y has the logic level 0.

Terminal P is briefly connected to a supply of logic level 1.

State the effect of this on the logic level of terminal X and the logic level of terminal Y.

Terminal P returns to logic level 0 again.

State the effect of this return to value 0 on the logic level of terminal X and on the logic level of terminal Y.

State how this circuit exhibits the property of memory.

In the space below, draw the circuit symbol for a NAND gate.

Energy is supplied to the LED by the NAND gate.

State where this energy comes from.

Complete the truth table for a NAND gate.

State the name of component Y.

Complete Fig. 8.3 to show the truth table for component Y.

A high voltage is shown as 1 and a low voltage as 0.

Fig. 8.3

At one instant, capacitor $\text{C}_1$ is uncharged, output P is 1 and output Q is 0.

Describe how the voltage across resistor $\text{R}_1$ changes until Q becomes 1.

Describe one change to the circuit that increases the frequency of the astable circuit.

State the name of the component shown in Fig. 5.2.

Explain why the motor switches on.

In the space below, draw the circuit symbol of a NOR gate.

Describe what is meant by a bistable circuit.

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